In SRC Assembly: Extend the SRC instruction set by adding an instruction swap ra, rb; (op = 7), that exchanges the contents of the two specified registers. a) define a plausible abstract RTN for this instruction. b) develop the concrete RTN for it, assuming the 1-bus SRC microarchitecture.

 In SRC Assembly:

Extend the SRC instruction set by adding an instruction swap ra, rb; (op = 7), that exchanges the contents of the two specified registers.
a) define a plausible abstract RTN for this instruction.
b) develop the concrete RTN for it, assuming the 1-bus SRC microarchitecture.

Dear,

a) RTN for instruction Swap the contents of registers are

           swap(:= op = 7) --> ( R[ra] <-- R[rb]: R[rb] <--R[ra]):

b)

                Step        RTN

                T0            MA <-- PC: C <-- PC + 4;

                T1            MD <-- M[MA]: PC <-- C;

                T2            IR <-- MD

                T3            MD <-- R[ra];

                T4            C <-- R[rb];

                T5            R[ra] <-- C;

                T6            R[rb] <-- MD;

    Here assuming C as temporary regiter initially rb value stored and then ra is assigned with C, MD valued is assigned to rb the contents of both registers are swaped.